Easy reading, no stress

Hello Rakib, here is your list of questions based on the previous year question analysis:

What are the classes of computer? 💻🤔 Explain briefly with their characteristics. 📝✨

Explain the layers of computer system architecture 🏗️⚙️ with a neat diagram. 📊✏️

Define throughput 🚀 and response time. ⏱️ How do they differ in measuring system performance? 📈📊

Discuss the basic functional units of a computer. 🧠🔌

Briefly discuss the bus structure 🚌 of a processor. 🧮

What do you mean by instruction set architecture (ISA)? 📜🏗️ Explain the MIPS instruction set format with examples. 💡📋

Differentiate between RISC and CISC architecture. ⚖️🔍 Give at least four differences. 4️⃣📝

1. Consider the below instruction: ⬇️🤔
   Load R2, LOC 📥
   Write the execution step of the above machine instruction. ⚙️✍️
2. What are the characteristics of a RISC processor? ⚡🧠
3. Draw the three-bus CISC-style processor organization. 🚌🚌🚌🎨
4. Write the execution steps with its architecture 🏗️ to complete the below instruction: 🏃‍♂️✅
   Add (R3), R1 ➕
5. Explain the MIPS addressing modes 📍🗺️ with suitable examples. 🌟
6. Write down the MIPS assembly code 🧑‍💻 for the following C code: 🇨💻
   f = (a + b) − (c + d); ➕➖
   g = f + A[10]; 🧮
7. Explain the compilation process 🔄 of a C program step by step. 🚶‍♂️ How does a high-level language 🗣️ convert to machine language? 🤖0️⃣1️⃣
8. Explain various addressing modes 🎯 with examples. ✨
9. What is an instruction? 📜 How is an instruction represented by a computer? 💻🤔
10. Explain with block diagram 🔲 the data path 🛣️ of a processor. 🧠
11. What are the control signals 🚦 for the data path? 🛤️
12. Briefly explain about dynamic scheduler 📅 with block diagram. 📊
13. Briefly explain the micro-programmed control unit 🎛️ for the branch instruction. 🌿
14. What is the purpose of a control unit? 🎯🎛️
15. Define Word, 🔤 Address, 📍 and Memory Access Time. ⏱️🧠
16. How does the pipeline 🚰 increase the performance 🚀 of a processor? 🧠 Explain. 🗣️
17. Explain the pipelined operation 🔄 in the ideal case. 🌟
18. What are the issues ⚠️ of pipelined operation? 🚧
19. Explain with example 💡 the use of operand forwarding ⏩ to resolve the data dependency issue. 🔗✅
20. Show the modification 🛠️ in the data path 🛤️ to support data forwarding. 📤
21. What is a data hazard? ☢️ How can it be overcome? 🛡️ Discuss its side effects on pipeline performance. 📉🚰
22. Show the algorithm 📜 and hardware diagram 🖥️🔌 for multiplication ✖️ in a processor. 🧠 Explain with an example. 🌟
23. Divide (1010)₂ ➗ by (0010)₂ using the division algorithm. 🧮 Show all steps. 🪜
24. Show the IEEE 754 binary representation 0️⃣1️⃣ of the number −0.625₁₀ in single 🥇 and double precision. 🥈
25. Design a 4-bit binary multiplier ✖️💻 with detailed implementation. 🛠️📝
26. Briefly analyze the Booth multiplication algorithm 🧐 for the given input: 16 × (−2). ✖️🔢
27. How is the performance 📈 of a computer measured? 📏 Explain with examples 💡 using clock rate, ⏱️ CPI, ⚙️ and MIPS. 🚀
28. Consider three processors 🧠 P1, P2, and P3 executing the same instruction set: 📜
    P1: Clock rate = 3 GHz, ⏱️ CPI = 1.5 ⚙️ P2: Clock rate = 2.5 GHz, ⏱️ CPI = 1.0 ⚙️
    P3: Clock rate = 4.0 GHz, ⏱️ CPI = 2.5 ⚙️
    (i) Which processor 🧠 has the highest performance 🏆 in instructions per second? ⚡
    (ii) If each processor executes a program in 12 seconds, ⏱️ find the number of cycles 🔄 and number of instructions 📜 for each. 🔢
    (iii) We want to reduce the execution time by 25%, 📉 but this causes a 15% increase in CPI. 📈 What clock rate is needed? ⏱️🤔
29. Explain Flynn’s classification 🗂️ of parallel hardware 🖥️🖥️ (SISD, SIMD, MISD, MIMD) in detail 📝 with examples. 🌟
30. What is cache memory? ⚡🧠 Define cache-hit, 🎯 cache-miss, ❌ and miss-penalty. ⏳ Explain with an example. 💡
31. Explain the write-through ✍️➡️ and write-back ✍️🔙 cache handling policies. What are the advantages ➕ and disadvantages ➖ of each? 🤔
32. Explain the Register Transfer Logic (RTL) 🔄🗄️ for the following MIPS instructions: addu, addi, lw, sw, and beq. 📜💻
33. Briefly describe the basic connection 🔌 of memory 🧠 to the processor. ⚙️
34. Briefly explain the internal organization 🏢 of bit cells 0️⃣1️⃣ in a memory chip. 💾
35. Design a 2M×32 memory module 💾🧩 using 512K×8 static memory chips. 🖥️🔧
36. What is virtual memory? ☁️🧠 Why is a mapping function 🗺️ needed in cache memory. ⚡