Skip to content

NOT Gate from NOR Gate

āĻāĻ•āϟāĻŋ NOT Gate āĻšāϞ⧋ āĻāĻ•āϟāĻŋ basic logic gate āϝāĻž āφāωāϟāĻĒ⧁āϟ āĻĻā§‡ā§Ÿ āϤāĻžāϰ āχāύāĻĒ⧁āĻŸā§‡āϰ complementāĨ¤ āĻāĻ•āϟāĻŋ NOR gate āĻšāϞ⧋ āĻāĻ•āϟāĻŋ universal logic gate āϝāĻž āĻŦā§āϝāĻŦāĻšāĻžāϰ āĻ•āϰ⧇ āĻ…āĻ¨ā§āϝ āϝ⧇āϕ⧋āύ⧋ āϧāϰāύ⧇āϰ logic gate āĻŦāĻžāĻ¸ā§āϤāĻŦāĻžā§Ÿāύ āĻ•āϰāĻž āϝāĻžā§ŸāĨ¤ āĻāĻ•āϟāĻŋ NOR gate āĻŽā§‚āϞāϤ āĻāĻ•āϟāĻŋ OR gate āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ NOT gate āĻāϰ āϏāĻŽāĻ¨ā§āĻŦ⧟āĨ¤

āĻāχ āϟāĻŋāωāĻŸā§‹āϰāĻŋ⧟āĻžāϞāϟāĻŋ āĻĒā§œā§‹ āĻāĻŦāĻ‚ āĻœā§‡āύ⧇ āύāĻžāĻ“ āϕ⧀āĻ­āĻžāĻŦ⧇ āĻāĻ•āϟāĻŋ NOT gate āϕ⧇ āĻāĻ•āϟāĻŋ NOR gate āĻŦā§āϝāĻŦāĻšāĻžāϰ āĻ•āϰ⧇ āĻŦāĻžāĻ¸ā§āϤāĻŦāĻžā§Ÿāύ āĻ•āϰāĻž āϝāĻžā§ŸāĨ¤ āφāϏ⧋, NOT āĻāĻŦāĻ‚ NOR gate āύāĻŋā§Ÿā§‡ āĻāĻ•āϟāĻŋ āϏāĻ‚āĻ•ā§āώāĻŋāĻĒā§āϤ āφāϞ⧋āϚāύāĻž āĻĻāĻŋā§Ÿā§‡ āĻļ⧁āϰ⧁ āĻ•āϰāĻŋāĨ¤


What is a NOT Gate?Âļ

āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āχāϞ⧇āĻ•āĻŸā§āϰāύāĻŋāĻ•ā§āϏ⧇, āĻāĻ•āϟāĻŋ NOT gate āĻšāϞ⧋ āĻāĻ•āϟāĻŋ basic logic gate āϝāĻžāϰ āϕ⧇āĻŦāϞ āĻāĻ•āϟāĻŋ āχāύāĻĒ⧁āϟ āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ āφāωāϟāĻĒ⧁āϟ āĻĨāĻžāϕ⧇āĨ¤ āĻāϟāĻŋ āĻāĻŽāύ āĻāĻ• āϧāϰāύ⧇āϰ logic gate āϝāĻžāϰ āφāωāϟāĻĒ⧁āϟ āϏāĻŦāϏāĻŽā§Ÿ āχāύāĻĒ⧁āĻŸā§‡āϰ complement āĻšā§ŸāĨ¤ āĻāϜāĻ¨ā§āϝ NOT gate āϕ⧇ inverter āύāĻžāĻŽā§‡āĻ“ āĻĄāĻžāĻ•āĻž āĻšā§ŸāĨ¤

What is a NOT Gate

āϝāĻĻāĻŋ NOT gate āĻāϰ āχāύāĻĒ⧁āϟ LOW (Logic 0) āĻšā§Ÿ, āϤāĻžāĻšāϞ⧇ āĻāϟāĻŋ HIGH (Logic 1) āφāωāϟāĻĒ⧁āϟ āĻĻā§‡ā§ŸāĨ¤ āϝāĻĻāĻŋ āχāύāĻĒ⧁āϟ HIGH (Logic 1) āĻšā§Ÿ, āϤāĻžāĻšāϞ⧇ NOT gate LOW (Logic 0) āφāωāϟāĻĒ⧁āϟ āĻĻā§‡ā§ŸāĨ¤ Figure-1 āĻ NOT gate āĻāϰ āϞāϜāĻŋāĻ• āϏāĻŋāĻŽā§āĻŦāϞ āĻĻ⧇āĻ–āĻžāύ⧋ āĻšā§Ÿā§‡āϛ⧇āĨ¤

Implementation of NOT Gate From NOR Gate 1Âļ

NOT āĻ…āĻĒāĻžāϰ⧇āĻļāύāϕ⧇ bar āϚāĻŋāĻšā§āύ āĻĻāĻŋā§Ÿā§‡ āĻĒā§āϰāĻ•āĻžāĻļ āĻ•āϰāĻž āĻšā§ŸāĨ¤ āϏ⧁āϤāϰāĻžāĻ‚, āϝāĻĻāĻŋ NOT gate āĻāϰ āχāύāĻĒ⧁āϟ āĻ­ā§āϝāĻžāϰāĻŋā§Ÿā§‡āĻŦāϞ āĻšā§Ÿ A, āϤāĻžāĻšāϞ⧇ āĻāϰ āφāωāϟāĻĒ⧁āϟ Y āĻšāĻŦ⧇ –

\[ Y = \overline{A} \]

Truth Table of NOT GateÂļ

NOT gate āĻāϰ truth table āχāύāĻĒ⧁āϟ āĻāĻŦāĻ‚ āφāωāϟāĻĒ⧁āϟ āĻ­ā§āϝāĻžāϰāĻŋā§Ÿā§‡āĻŦāϞ⧇āϰ āϏāĻŽā§āĻĒāĻ°ā§āĻ• āĻĻ⧇āĻ–āĻžā§ŸāĨ¤ āύāĻŋāĻšā§‡ NOT gate āĻāϰ truth table āĻĻ⧇āĻ“ā§ŸāĻž āĻšāϞ⧋ −

Input (A) Output (Y = \(\overline{A}\))
0 1
1 0

What is a NOR Gate?Âļ

NOR gate āĻšāϞ⧋ āĻāĻ•āϟāĻŋ universal gate, āϤāĻžāχ āĻāϟāĻŋ āĻŦā§āϝāĻŦāĻšāĻžāϰ āĻ•āϰ⧇ āĻ…āĻ¨ā§āϝ āϝ⧇āϕ⧋āύ⧋ āϧāϰāύ⧇āϰ logic gate āĻŦāĻžāĻ¸ā§āϤāĻŦāĻžā§Ÿāύ āĻ•āϰāĻž āϝāĻžā§ŸāĨ¤ NOR gate āĻŽā§‚āϞāϤ NOT gate āĻāĻŦāĻ‚ OR gate āĻāϰ āϏāĻŽāĻ¨ā§āĻŦ⧟, āĻ…āĻ°ā§āĻĨāĻžā§Ž OR gate āĻāϰ āϏāĻžāĻĨ⧇ NOT gate āĻŦāϏāĻžāϞ⧇ āϤāĻž NOR gate āĻšā§ŸāĨ¤ āϏ⧁āϤāϰāĻžāĻ‚ −

\[ \text{NOR Gate} = \text{OR Gate} + \text{NOT Gate} \]

nor-gate

āĻāĻ•āϟāĻŋ NOR gate āϝ⧇āϕ⧋āύ⧋ āϏāĻ‚āĻ–ā§āϝāĻ• āχāύāĻĒ⧁āϟ āύāĻŋāϤ⧇ āĻĒāĻžāϰ⧇ āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ āφāωāϟāĻĒ⧁āϟ āĻĻā§‡ā§ŸāĨ¤ NOR gate āĻāϰ āφāωāϟāĻĒ⧁āϟ HIGH (Logic 1) āĻšāĻŦ⧇ āϤāĻ–āύāχ āϝāĻ–āύ āϏāĻŦ āχāύāĻĒ⧁āϟ LOW (Logic 0) āĻĨāĻžāϕ⧇āĨ¤ āĻ…āĻ¨ā§āϝ āϝ⧇āϕ⧋āύ⧋ āχāύāĻĒ⧁āϟ āĻ•āĻŽā§āĻŦāĻŋāύ⧇āĻļāύ⧇ āĻāϰ āφāωāϟāĻĒ⧁āϟ LOW (Logic 0) āĻšā§ŸāĨ¤ Figure-2 āϤ⧇ āĻāĻ•āϟāĻŋ two-input NOR gate āĻāϰ āϞāϜāĻŋāĻ• āϏāĻŋāĻŽā§āĻŦāϞ āĻĻ⧇āĻ–āĻžāύ⧋ āĻšā§Ÿā§‡āϛ⧇āĨ¤

Implementation of NOT Gate From NOR Gate 2Âļ

NOR gate āĻāϰ āĻ•āĻžāĻ°ā§āϝāĻĒā§āϰāĻŖāĻžāϞ⧀ āĻĒā§āϰāĻ•āĻžāĻļ āĻ•āϰāĻž āϝāĻžā§Ÿ āĻāĻ­āĻžāĻŦ⧇ −

\[ Y = \overline{(A + B)} \]

āĻāĻ–āĻžāύ⧇, A āĻāĻŦāĻ‚ B āĻšāϞ⧋ āχāύāĻĒ⧁āϟ āĻ­ā§āϝāĻžāϰāĻŋā§Ÿā§‡āĻŦāϞ āĻāĻŦāĻ‚ Y āĻšāϞ⧋ NOR gate āĻāϰ āφāωāϟāĻĒ⧁āϟ āĻ­ā§āϝāĻžāϰāĻŋā§Ÿā§‡āĻŦāϞāĨ¤ āĻāχ āφāωāϟāĻĒ⧁āϟ āĻāĻ•ā§āϏāĻĒā§āϰ⧇āĻļāύāϕ⧇ āĻĒ⧜āĻž āϝāĻžā§Ÿ āĻāĻ­āĻžāĻŦ⧇ –
"Y is equal to A plus B whole bar"

Truth Table of NOR GateÂļ

āĻŦāĻŋāĻ­āĻŋāĻ¨ā§āύ āχāύāĻĒ⧁āϟ āĻ•āĻŽā§āĻŦāĻŋāύ⧇āĻļāύ⧇āϰ āϜāĻ¨ā§āϝ NOR gate āĻāϰ truth table āύāĻŋāĻšā§‡ āĻĻ⧇āĻ“ā§ŸāĻž āĻšāϞ⧋ −

A B Y = \(\overline{(A + B)}\)
0 0 1
0 1 0
1 0 0
1 1 0

Implementation of NOT Gate from NOR GateÂļ

āϝ⧇āĻŽāύ āωāĻĒāϰ⧇ āφāϞ⧋āϚāύāĻž āĻ•āϰāĻž āĻšā§Ÿā§‡āϛ⧇, āĻāĻ•āϟāĻŋ NOR gate āĻšāϞ⧋ universal gate, āϤāĻžāχ āĻāϟāĻŋ āĻŦā§āϝāĻŦāĻšāĻžāϰ āĻ•āϰ⧇ āϝ⧇āϕ⧋āύ⧋ āϧāϰāύ⧇āϰ logic gate āĻŦāĻžāĻ¸ā§āϤāĻŦāĻžā§Ÿāύ āĻ•āϰāĻž āϝāĻžā§ŸāĨ¤ Figure-3 āĻ NOR gate āĻŦā§āϝāĻŦāĻšāĻžāϰ āĻ•āϰ⧇ NOT gate āĻŦāĻžāĻ¸ā§āϤāĻŦāĻžā§Ÿāύ⧇āϰ āϚāĻŋāĻ¤ā§āϰ āĻĻ⧇āĻ–āĻžāύ⧋ āĻšā§Ÿā§‡āϛ⧇āĨ¤

NOT gate āϕ⧇ NOR gate āĻŦā§āϝāĻŦāĻšāĻžāϰ āĻ•āϰ⧇ āĻŦāĻžāĻ¸ā§āϤāĻŦāĻžā§Ÿāύ āĻ•āϰāϤ⧇, āφāĻŽāϰāĻž āϕ⧇āĻŦāϞ āϏāĻŦ āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞāϗ⧁āϞ⧋āϕ⧇ āĻāĻ•āϏāĻžāĻĨ⧇ āϝ⧁āĻ•ā§āϤ āĻ•āϰāĻŋ āĻāĻŦāĻ‚ āϝ⧇ signal āϕ⧇ invert āĻ•āϰāϤ⧇ āϚāĻžāχ āϏ⧇āϟāĻŋ āĻāχ common āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ⧇ āĻĒā§āĻ°ā§Ÿā§‹āĻ— āĻ•āϰāĻŋāĨ¤

āĻāĻ›āĻžā§œāĻžāĻ“, āφāĻŽāϰāĻž NOR gate āϕ⧇ NOT gate āĻšāĻŋāϏ⧇āĻŦ⧇ āĻŦā§āϝāĻŦāĻšāĻžāϰ āĻ•āϰāϤ⧇ āĻĒāĻžāϰāĻŋ āϝāĻĻāĻŋ āϏāĻŦ āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āĻ›āĻžā§œāĻž āĻāĻ•āϟāĻŋ āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞāϕ⧇ Logic 0 āϤ⧇ āϝ⧁āĻ•ā§āϤ āĻ•āϰāĻŋ āĻāĻŦāĻ‚ āĻŦāĻžāĻ•āĻŋ āχāύāĻĒ⧁āĻŸā§‡ āϏ⧇āχ signal āĻĻāĻŋāχ āϝ⧇āϟāĻŋāϕ⧇ invert āĻ•āϰāϤ⧇ āϚāĻžāχāĨ¤ āĻāχ āĻ•āύāĻĢāĻŋāĻ—āĻžāϰ⧇āĻļāύāϕ⧇ controlled inverter āĻŦāϞāĻž āĻšā§ŸāĨ¤

āϏ⧁āϤāϰāĻžāĻ‚, āĻāχāĻ­āĻžāĻŦ⧇ āϕ⧇āĻŦāϞ NOR gate āĻŦā§āϝāĻŦāĻšāĻžāϰ āĻ•āϰ⧇āχ āĻāĻ•āϟāĻŋ NOT gate āĻŦāĻžāĻ¸ā§āϤāĻŦāĻžā§Ÿāύ āĻ•āϰāĻž āϏāĻŽā§āĻ­āĻŦāĨ¤